Hardware-In-The-Loop Simulation Low-Cost Platform

被引：2
|
作者：
Renaux, Paulo B. [1 ]
Linhares, Robson R. [1 ]
Renaux, Douglas P. B. [1 ]
机构：
[1] UTFPR Fed Univ Technol, LIT CITEC, PPGCA, DAELN,DAINF, Curitiba, Parana, Brazil
来源：
2017 VII BRAZILIAN SYMPOSIUM ON COMPUTING SYSTEMS ENGINEERING (SBESC) | 2017年
关键词：
Hardware-in-the-Loop simulation; low-cost simulation;
D O I：
10.1109/SBESC.2017.30
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Hardware-in-the-Loop Simulation is being increasingly used in verification and validation of embedded computer systems; as well as for rapid prototyping and validation of models. The numerous benefits of this technique and the possibility of widespread use is hindered by the high cost of the necessary infrastructure. The proposed solution is based on a PC executing the plant simulation and connected, via USB, to an electrical interface module that provides the interfacing signals to the system-in-test. The results indicate that the simulation platform is able to send signals to the system-in-test and receive replies, via interface module, with roundtrip latencies in the order of three milliseconds, which are compatible with the response times required by a range of applications. This platform is mainly aimed at educational purposes, because its relatively low cost makes it more affordable by academic institutions and students.
引用
收藏
页码：173 / 180
页数：8
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