Interface hardening with deuterium implantation

被引:9
作者
Misra, D [1 ]
Jarwal, RK [1 ]
机构
[1] New Jersey Inst Technol, Dept Elect & Comp Engn, Newark, NJ 07102 USA
关键词
D O I
10.1149/1.1485084
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
Incorporation of deuterium to passivate silicon-dangling bonds at the Si-SiO2 interface through ion implantation before the growth of the gate oxide is the focus of this work. Polycrystalline silicon gate n-channel metal-oxide-semiconductor diodes with 4 nm gate oxide grown on deuterium-implanted p-type silicon (100) substrate were investigated. Deuterium implanted at a light dose of 1 x 10(-4)/cm(2) at 25 keV reduced oxide leakage current due to reduction in oxide charge and interface traps. Out-diffusion of deuterium during oxidation was observed for lower energy implant. Higher energy implant, on the other hand, causes enhanced substrate damage and prevents deuterium from reaching the Si-SiO2 interface. Formation of Si-D bonds at the interface as well as in bulk oxide seems to reduce bulk electron traps as noticed in constant current stress measurements. Interface state density N-it as obtained from the conductance measurements suggests that implanted deuterium passivates the silicon dangling bonds, thereby reducing the interface charge. The N-it distribution in silicon bandgap shows that there is significant reduction in N-it for deuterium-implanted samples at an energy position about 0.2 eV above midgap, which corresponds well with P-b0 center 0/- transition level of E-v + 0.85 eV. (C) 2002 The Electrochemical Society.
引用
收藏
页码:G446 / G450
页数:5
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