Functional verification of the z990 superscalar, multibook microprocessor complex

被引:7
作者
Bair, DG
German, SM
Wollyung, WD
Kaminski, EJ
Schafer, J
Mullen, MP
Lewis, WJ
Wisniewski, R
Walter, J
Mittermaier, S
Vokhshoori, V
Adkins, RJ
Halas, M
Ruane, T
Hahn, U
机构
[1] IBM Syst & Technol Grp, Poughkeepsie, NY 12601 USA
[2] IBM Corp, Div Res, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[3] IBM Deutschland Entwicklung GmbH, IBM Syst & Technol Grp, D-71032 Boblingen, Germany
[4] IBM Syst & Technol Grp, Poughkeepsie, NY 12603 USA
关键词
D O I
10.1147/rd.483.0347
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper describes the verification methods and techniques that were established to verify the microarchitecture and architectural correctness of the z990 microprocessor and storage subsystem. The ring-based, four-book storage subsystem links 64 superscalar microprocessor and storage in this system. The verification process started at the unit level, which focused on the correctness of the microarchitecture, and then proceeded to the element level to verify the architectural correctness of the microprocessor and storage subsystem. After successfully completing element stress testing, the components were combined and verified at the system level. Since the methods used at system-level verification were much the same as the ones used on the CMOS-based IBM S/390(R) Parallel Enterprise Server G4, the focus of this paper is on the work done at the unit and element levels.
引用
收藏
页码:347 / 365
页数:19
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