On the Way to Zero Defect of Plastic-Encapsulated Electronic Power Devices-Part III: Chip Coating, Passivation, and Design

被引:12
作者
Alpern, Peter [1 ]
Nelle, Peter [1 ]
Barti, Endre [2 ]
Gunther, Helmut [1 ]
Kessler, Angela [3 ]
Tilgner, Rainer [1 ]
Stecher, Matthias [1 ]
机构
[1] Infineon Technol AG, D-85579 Neubiberg, Germany
[2] Siemens AG, D-81730 Munich, Germany
[3] Infineon Technol AG, D-93009 Regensburg, Germany
关键词
Design; finite-element-method (FEM) simulation; passivation; passivation cracks; polyimide (PI); power device; thermomechanical stress; zero defect;
D O I
10.1109/TDMR.2009.2018656
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Concerning thermomechanically induced failures such as metal-line deformation and passivation cracks, there is a practicable way to achieve the zero-defect limit of plastic-encapsulated power devices. This limit can be reached by, first, evaluating the influence of the major components involved and, consequently, by selecting the appropriate materials and measures, and, second, by always keping in mind the interdependence between all components, i.e., chip and package have to be regarded as an entity. An important finding was that applying simply one improvement step will not necessarily lead to the desired goal. Only the implementation of all improvement steps considering their interdependence is the key for the perfect overall system chip and package. In Part III of this series of papers, the influence of passivation and die coating materials on thermomechanical damage is investigated. Finally, it is shown that an intelligent chip design, in combination with a stiff Al multilayer, a low-stress molding compound (low coefficient of thermal expansion and high Young's modulus), a new passivation material, and an appropriate polyimide layer, may reduce the thermomechanical damage to zero, even for electronic power devices.
引用
收藏
页码:288 / 295
页数:8
相关论文
共 27 条
  • [1] A SIMPLE TEST CHIP TO ASSESS CHIP AND PACKAGE DESIGN IN THE CASE OF PLASTIC ASSEMBLING
    ALPERN, P
    WICHER, V
    TILGNER, R
    [J]. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART A, 1994, 17 (04): : 583 - 589
  • [2] A simple test chip to assess chip and package design in the case of plastic assembling (vol 18, 585, 1995)
    Alpern, P
    Wicher, V
    Tilgner, R
    [J]. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY PART A, 1995, 18 (04): : 862 - 863
  • [3] ALPERN P, 1992, P ELECTR C, P926, DOI 10.1109/ECTC.1992.204316
  • [4] On the Way to Zero Defect of Plastic-Encapsulated Electronic Power Devices-Part II: Molding Compound
    Alpern, Peter
    Nelle, Peter
    Barti, Endre
    Gunther, Helmut
    Kessler, Angela
    Tilgner, Rainer
    Stecher, Matthias
    [J]. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2009, 9 (02) : 279 - 287
  • [5] On the Way to Zero Defect of Plastic-Encapsulated Electronic Power Devices-Part I: Metallization
    Alpern, Peter
    Nelle, Peter
    Barti, Endre
    Gunther, Helmut
    Kessler, Angela
    Tilgner, Rainer
    Stecher, Matthias
    [J]. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2009, 9 (02) : 269 - 278
  • [6] Barti E., 2007, P 2 ANSA META INT C, P241
  • [7] BLISH RC, 1991, P IEEE 29 IRPS, P22
  • [8] CHEN AS, 1993, P ELECTR C, P693, DOI 10.1109/ECTC.1993.346774
  • [9] DUNN CF, 1990, P IEEE 28 IRPS, P252
  • [10] SHEAR-STRESS EVALUATION OF PLASTIC PACKAGES
    EDWARDS, DR
    HEINEN, KG
    GROOTHUIS, SK
    MARTINEZ, JE
    [J]. IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1987, 10 (04): : 618 - 627