ESD protection design for FX integrated circuits: New challenges

被引：30

作者：

Wang, AZ ^{[1
]}

Feng, HG ^{[1
]}

Zhan, RY ^{[1
]}

Chen, G ^{[1
]}

Wu, Q ^{[1
]}

机构：

[1] IIT, Dept Elect & Comp Engn, Chicago, IL 60616 USA

来源：

PROCEEDINGS OF THE IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2002年

关键词：

D O I：

10.1109/CICC.2002.1012860

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The challenge in RF ESD protection circuit design, still a problem in definition, is to address the complex interactions between the ESD protection network and the circuit being protected in both directions. This paper discusses related key factors, e.g., switching and accidental triggering of ESD protection networks, as well as ESD-induced parasitic capacitive, resistive, noise coupling and self-generated noise effects. Evaluation techniques include s-parameter, Q-factor and overall specification examination. Low-parasitic compact structures are the solutions to RF ESD protection.

引用

页码：411 / 418

页数：4

共 21 条

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