Improved electrical performance of a sol-gel IGZO transistor with high-k Al2O3 gate dielectric achieved by post annealing

被引:47
作者
Lee, Esther [1 ]
Kim, Tae Hyeon [1 ]
Lee, Seung Won [2 ]
Kim, Jee Hoon [1 ]
Kim, Jaeun [1 ]
Jeong, Tae Gun [1 ]
Ahn, Ji-Hoon [2 ]
Cho, Byungjin [1 ]
机构
[1] Chungbuk Natl Univ, Dept Adv Mat Engn, Chungbuk 28644, South Korea
[2] Korea Maritime & Ocean Univ, Dept Elect Mat Engn, Busan 49112, South Korea
基金
新加坡国家研究基金会;
关键词
Indium gallium zinc oxide IGZO; Post annealing; Capacitance-voltage measurement; X-ray photoelectron spectroscopy depth profiling; Electrical bias stress stability; THIN-FILM TRANSISTORS; TRANSPARENT; OXIDE; TEMPERATURE; FABRICATION; DESIGN;
D O I
10.1186/s40580-019-0194-1
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
We have explored the effect of post-annealing on the electrical properties of an indium gallium zinc oxide (IGZO) transistor with an Al2O3 bottom gate dielectric, formed by a sol-gel process. The post-annealed IGZO device demonstrated improved electrical performance in terms of threshold variation, on/off ratio, subthreshold swing, and mobility compared to the non-annealed reference device. Capacitance-voltage measurement confirmed that annealing can lead to enhanced capacitance properties due to reduced charge trapping. Depth profile analysis using X-ray photoelectron spectroscopy proved that percentage of both the oxygen vacancy (V-O) and the hydroxyl groups (M-OH) within the IGZO/Al2O3 layers, which serve as a charge trapping source, can be substantially reduced by annealing the fabricated transistor device. Furthermore, the undesired degradation of the contact interface between source/drain electrode and the channel, which mainly concerns V-O, can be largely prevented by post-annealing. Thus, the facile annealing process also improves the electrical bias stress stability. This simple post annealing approach provides a strategy for realising better performance and reliability of the solid sot-gel oxide transistor.
引用
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页数:8
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