Two-ring systolic array network for artificial neural networks

被引：2

作者：

Amin, H ^{[1
]}

Curtis, KM ^{[1
]}

Gill, BRH ^{[1
]}

机构：

[1] Univ Nottingham, Sch Elect & Elect Engn, Nottingham NG7 2RD, England

来源：

IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 1999年 / 146卷 / 05期

关键词：

D O I：

10.1049/ip-cds:19990534

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The paper describes an efficient and fast systolic architecture for the implementation of artificial neural networks. The proposed architecture, TORAN (two-in-one ring array network), combines two-ring systolic array networks to perform two sets of weight-data pair multiplication operations in parallel. This increases the hardware by 40% but reduces by 50% the number of cycles to perform the weighted sum calculation compared with a single systolic ring-array network.

引用

页码：225 / 230

页数：6

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