A fully integrated 40-Gbit/s clock and data recovery circuit using InP/InGaAs HBTs

被引：8

作者：

Nosaka, H ^{[1
]}

Sano, E ^{[1
]}

Ishii, K ^{[1
]}

Ida, M ^{[1
]}

Kurishima, K ^{[1
]}

Enoki, T ^{[1
]}

Shibata, T ^{[1
]}

机构：

[1] NTT Corp, NTT Photon Labs, Atsugi, Kanagawa 2430198, Japan

来源：

2002 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-3 | 2002年

关键词：

D O I：

10.1109/MWSYM.2002.1011564

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An integrated clock and data recovery (CDR) circuit is a key element for optical communication systems at 40 Gbit/s. We present a fully integrated 40-Gbit CDR circuit fabricated using InP/InGaAs HBTs. The circuit contains a linear-type phase detector and a full-data-rate voltage-controlled oscillator. Error-free operation and wide eye opening were obtained for 40-Gbit/s pseudorandom bit sequence (PRBS) with a length of 2(23)-1. The fabricated IC dissipates 1.71 W at a supply voltage of -4.5V.

引用

页码：83 / 86

页数：4