A 0.18 μm dual-gate CMOS model for the design of 2.4 GHz low noise amplifier

被引：0

作者：

Liang, Kung-Hao ^{[1
]}

Chan, Yi-Jen ^{[1
]}

机构：

[1] Natl Cent Univ, Dept Elect Engn, Chungli 32054, Taiwan

来源：

2006 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS | 2006年

关键词：

dual-gate; CMOS; BSIM; low-noise amplifier;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A dual-gate TSNIC 0.18 mu m gate-length n-MOS has been measured and characterized. The modified dual-gate large-signal model consists of two intrinsic, single-gate conventional BSIM3v3 nonlinear models and the passive network is proposed representing the device parasitic effects. This large-signal rf model includes the required passive components to fit the device dc and rf characteristics. The extrinsic elements of capacitance and inductance are calculated from the three-port S-parameters. Good agreement has been obtained between the simulation results of the equivalent circuit model and the measured data up to 15 GHz. In order to verify this modified model, a 2.4 GHz dual-gate low noise amplifier was designed based on this modified model. The LNA measurement results are consistent with the simulations, which demonstrate that the cascode-type dual-gate CMOS model can be applied for microwave circuit design.

引用

页码：353 / +

页数：2

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