An Introduction to High-Level Synthesis

被引：178

作者：

Coussy, Philippe ^{[1
]}

Meredith, Michael

Gajski, Daniel D. ^{[2
]}

Takach, Andres

机构：

[1] Univ Bretagne Sud, Lab STICC, Ctr Rech, F-56321 Lorient, France

[2] Univ Calif Irvine, Ctr Embedded Comp Systems, Irvine, CA USA

来源：

IEEE DESIGN & TEST OF COMPUTERS | 2009年 / 26卷 / 04期

关键词：

Architectures; Custom processors; Design and test; Hardware; Hardware synthesis and verification; High-level synthesis; Memory management; Multiplexing; Registers; Resource management; RTL abstraction; Software;

D O I：

10.1109/MDT.2009.69

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Editor's note: High-level synthesis raises the design abstraction level and allows rapid generation of optimized RTL hardware for performance, area, and power requirements. This article gives an overview of state-of-the-art HLS techniques and tools. © 2009 IEEE.

引用

页码：8 / 17

页数：10

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