Micro programmable built-in self repair for SRAMs

被引：7

作者：

Zappa, R ^{[1
]}

Selva, C ^{[1
]}

Rimondi, D ^{[1
]}

Torelli, C ^{[1
]}

Crestan, M ^{[1
]}

Mastrodomenico, G ^{[1
]}

Albani, L ^{[1
]}

机构：

[1] STMicroelect, I-20041 Agrate Brianza, Italy

来源：

RECORDS OF THE 2004 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN AND TESTING | 2004年

关键词：

D O I：

10.1109/MTDT.2004.1327987

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A Built-In Self Repair (BISR) machine is herewith proposed, able to test at speed and repair embedded Static Random Access Memories. Unlike the common approach to blow laser-fuse registers, here the repair operation is completely accomplished by the BISR machine, with no external intervene. The information related to the repair operation is stored into an on-chip FLASH memory. The machine is user programmable, since it can test memories of different capacity, architecture and aspect ratio, with up to four test algorithms and two test flows. An "industrial" test flow is intended for production; while, in case of failure, a more complex "screening flow" allows to distinguish whether the unsuccessful repair operation is due to exceeded redundancy capacity or to faulty FLASH programming. This system is aimed to enhance test diagnostic capability and to improve production yield of devices which it is connected to, by-passing the actual losses in time and resources of currently used laser-fuse approach.

引用

页码：72 / 77

页数：6

共 50 条

[31] Built-in Self-Repair Architecture Generator for Digital Cores
Kristofik, Stefan
Balaz, Marcel
2016 IEEE 19TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS & SYSTEMS (DDECS), 2016, : 138 - 143
[32] An Efficient Built-in Self-Repair Scheme for Area Reduction
Cho, Keewon
Lee, Young-woo
Seo, Sungyoul
Kang, Sungho
PROCEEDINGS INTERNATIONAL SOC DESIGN CONFERENCE 2017 (ISOCC 2017), 2017, : 105 - 106
[33] An Efficient Built-In Self-Repair Scheme for Multiple RAMs
Nair, Arathy S.
Bonifus, P. L.
2017 2ND IEEE INTERNATIONAL CONFERENCE ON RECENT TRENDS IN ELECTRONICS, INFORMATION & COMMUNICATION TECHNOLOGY (RTEICT), 2017, : 2076 - 2080
[34] Test scheduling for memory cores with built-in self-repair
Yoneda, Tomokazu
Fukuda, Yuusuke
Fujiwara, Hideo
PROCEEDINGS OF THE 16TH ASIAN TEST SYMPOSIUM, 2007, : 199 - 204
[35] A Built-in Self-Repair Architecture for Random Access Memories
Patnaik, Sanjay
Ravi, V.
NANOELECTRONIC MATERIALS AND DEVICES, VOL III, 2018, 466 : 133 - 146
[36] Built-In Self-Repair Techniques for Content Addressable Memories
Lin, Guan-Quan
Wang, Zhen-Yu
Lu, Shyue-Kung
2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM, 2009, : 267 - 270
[37] Built-In Self-Repair Techniques for Heterogeneous Memory Cores
Wang, Zhen-Yu
Tsai, Yi-Ming
Lu, Shyue-Kung
IEEE 15TH PACIFIC RIM INTERNATIONAL SYMPOSIUM ON DEPENDABLE COMPUTING, PROCEEDINGS, 2009, : 69 - +
[38] A novel built-in self-repair approach for embedded RAMs
Lu, SK
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2003, 19 (03): : 315 - 324
[39] Wireless Built-In Self-Repair Architectures for Embedded RAMs
Wang, Hen-Yu
Tsai, Yi-Ming
Hsiao, Yuan-Cheng
Lu, Shyue-Kung
2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 573 - +
[40] New Microcode's Generation Technique for Programmable Memory Built-In Self Test
MohdNoor, NurQamarina
Saparon, Azilah
Yusof, Yusrina
Adnan, Mahmud
2010 19TH IEEE ASIAN TEST SYMPOSIUM (ATS 2010), 2010, : 407 - 412

← 1 2 3 4 5 →