FPGA-based video processor for log-polar re-mapping in the retina heterogeneous image processing system

被引：0

作者：

Gorgon, M ^{[1
]}

Jablonski, M ^{[1
]}

机构：

[1] Univ Min & Met Krakow, Biocybernet Lab, Inst Automat, PL-30059 Krakow, Poland

来源：

PROGRAMMABLE DEVICES AND SYSTEMS 2001 | 2002年

关键词：

image processing; image analysis; hardware-software co-design; FPGA; digital signal processors; multiprocessing system;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In the present publication an implementation of image re-mapping from Cartesian to Log-Polar space is presented. Realization of the algorithm has been distributed between the FPGA and DSP devices. The re-mapping process is performed in real time. In the paper the hardware architecture, realization of the Video Processor and results of the algorithm implementation are presented. Copyright (C) 2001 IFAC.

引用

页码：49 / 54

页数：6

共 10 条

[1] ASSENSI CS, 2001, P FPL2001
[2] DORFNER G, 2001, LIFE LIKE PERCEPTION
[3] FPGA based controller for heterogenous image processing system
Gorgon, M
Przybylo, J
[J]. EUROMICRO SYMPOSIUM ON DIGITAL SYSTEMS DESIGN, PROCEEDINGS, 2001, : 453 - 457
[4] Hardware based image processing library for Virtex FPGA
Gorgon, M
Tadeusiewicz, R
[J]. RECONFIGURABLE TECHNOLOGY: FPGAS FOR COMPUTING AND APPLICATIONS II, 2000, 4212 : 1 - 10
[5] Lesser F, 2001, EUROMICRO SYMPOSIUM ON DIGITAL SYSTEMS DESIGN, PROCEEDINGS, P372, DOI 10.1109/DSD.2001.952335
[6] MIKRUT Z, 1999, U MINING METALLURGY, V199
[7] Sandini G., 2000, P IEEE SENS ARR MULT
[8] Schwartz E. L., 1997, BIOL CYBERN, V25, P181
[9] WIATR K, 1996, P ICIP, V1, P649
[10] XUE J, 2000, SPIE P, V4212, P11

← 1 →