A novel dynamically Programmable Arithmetic Array using code division multiple access bus

被引:0
作者
Tan, BK [1 ]
Yoshimura, R [1 ]
Matsuoka, T [1 ]
Taniguchi, K [1 ]
机构
[1] Osaka Univ, Grad Sch Engn, Dept EIS, Suita, Osaka 5650871, Japan
来源
ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS | 2001年
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A new architecture-based reconfigurable device, Dynamically Programmable Arithmetic Array(DPAA), which is proposed to overcome design issues such as low chip area utilization, low routing flexibility and long reconfiguration time in most reconfigurable architectures. The DPAA consists of carious basic arithmetic blocks which are interconnected through a differential multiple access bus. Connections between the arithmetic blocks are done virtually through code matching and thus, 100% routing flexibility can be achieved. Fault tolerance can be realized without allocating specialized spare elements or applying special techniques. The DPAA also features dynamical programmable, higher-density, easier compilation and less time for reconfiguration compared with conventional reconfigurable architectures.
引用
收藏
页码:913 / 916
页数:4
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