Advanced Circuit Reliability Verification for Robust Design

被引：5

作者：

Fan, Antony ^{[1
]}

Wang, Joddy ^{[1
]}

Aptekar, Vladimir ^{[1
]}

机构：

[1] Synopsys Inc, Analog & Mixed Signal Simulat, Mountain View, CA 94043 USA

来源：

2019 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2019年

关键词：

Aging; electromigration; compact model; self-heat; circuit simulation; FIT; reliability; ASIL;

D O I：

10.1109/irps.2019.8720531

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The growth in safety-critical applications for automotive electronics and mainstream adoption of FinFET technologies have resulted in significant increase in IC design reliability challenges. IC designers must contend with advanced circuit complexity with stringent requirements on performance, low power, design robustness for safety, and reliability such as electro-migration and device-aging. For safety-critical applications such as Autonomous Driving, ADAS, and Connected Car, IC designers are now looking to adopt rigorous and systematic methodologies to meet functional safety standard. In this paper, we will discuss the models used on circuit reliability verification, and application of these models to assess IC reliability for targeted requirements with latest Synopsys' AMS solution for robust design.

引用

页数：8

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