A FIFO-based architecture for high speed image compression

被引：0
|
作者：
Masoudnia, A [1 ]
Sarbazi-Azad, H [1 ]
Boussakta, S [1 ]
机构：
[1] Univ Teesside, Sch Sci & Technol, Middlesbrough, Cleveland, England
来源：
ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS | 2001年
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper proposes a novel architecture for high-performance wavelet-based image compression. Primarily performance analysis shows that using the normal implementation technology the proposed architecture can process a real-time video stream of up to 35 frames (512x512 pixels) per second.
引用
收藏
页码：221 / 224
页数：4
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