Improvements of solder ball shear strength of a wafer-level CSP using a novel Cu stud technology

被引:14
作者
Chang, KC [1 ]
Chiang, KN
机构
[1] Taiwan Semicond Mfg Co Ltd, Hsinchu 300, Taiwan
[2] Natl Tsing Hua Univ, Dept Power Mech Engn, Hsinchu 300, Taiwan
来源
IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES | 2004年 / 27卷 / 02期
关键词
Cu stud; nonlinear finite element method; shear test; solder ball shear strength; wafer level chip scale package (WLCSP);
D O I
10.1109/TCAPT.2004.828557
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The solder ball shear test has been widely adopted in the electronics industry to estimate the strength of solder ball attachment of advanced electronic packages. A solder ball with low shear strength is usually considered as a weak solder joint in package reliability testing. Consequently, demands for increasing the solder ball shear strength have risen in recent years. This work attempts to enhance the solder ball shear strength of the wafer level chip scale package by forming a Cu stud on the surface of the solder pad. The novel Cu stud design technology has been achieved by using a simple semiconductor manufacturing process. To investigate the impact of Cu stud, a three-dimensional nonlinear finite element method is used for Cu stud design. Furthermore, the shear force-displacement curves, obtained by computational analysis, are compared with the experimental results to demonstrate the accuracy of the finite element models. This investigation also explores the effects of various parameters including the Cu stud's dimension, shape, and material properties on solder ball shear strength. The analytical results establish that a suitable size of Cu stud in a solder ball can effectively enhance the ball's shear strength.
引用
收藏
页码:373 / 382
页数:10
相关论文
共 26 条
[1]  
Belytschko T., 2013, NONLINEAR FINITE ELE
[2]  
Bertsekas D., 2019, Reinforcement Learning and Optimal Control
[3]  
Brakke K. A., 1996, SURFACE EVOLVER MANU
[4]   Solder joint reliability analysis of a wafer-level CSP assembly with CU studs formed on solder pads [J].
Chang, KC ;
Chiang, KN .
JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS, 2003, 26 (04) :467-479
[5]   Prediction of liquid formation for solder and non-solder mask defined array packages [J].
Chen, WH ;
Chiang, KN ;
Lin, SR .
JOURNAL OF ELECTRONIC PACKAGING, 2002, 124 (01) :37-44
[6]   Electronic packaging reflow shape prediction for the solder mask defined ball grid array [J].
Chiang, KN ;
Chen, WL .
JOURNAL OF ELECTRONIC PACKAGING, 1998, 120 (02) :175-178
[7]   An overview of solder bump shape prediction algorithms with validations [J].
Chiang, KN ;
Yuan, CA .
IEEE TRANSACTIONS ON ADVANCED PACKAGING, 2001, 24 (02) :158-162
[8]   The influence of test parameters and package design features on ball shear test requirements [J].
Coyle, RJ ;
Solan, PP .
TWENTY SIXTH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, PROCEEDINGS, 2000, :168-177
[9]  
DIRNFELD SF, 1990, WELDING J OCT, P373
[10]  
ERICH R, 1999, P 24 IEEE CPMT INT E, P16