共 18 条
- [2] CELEIRO F, 1996, P EUR DAC EUR VHDL
- [3] Testability analysis and ATPG on behavioral RT-level VHDL [J]. ITC - INTERNATIONAL TEST CONFERENCE 1997, PROCEEDINGS: INTEGRATING MILITARY AND COMMERCIAL COMMUNICATIONS FOR THE NEXT CENTURY, 1997, : 753 - 759
- [4] Corno F., 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537), P385, DOI 10.1109/DATE.2000.840300
- [5] Automatic VHDL restructuring for RTL synthesis optimization and testability improvement [J]. INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1998, : 436 - 441
- [6] COUDERT O, 1989, P WORKSH AUT VER MET
- [7] Fallah F., 1999, Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361), P666, DOI 10.1109/DAC.1999.782026
- [8] Fallah F, 1998, 1998 DESIGN AUTOMATION CONFERENCE, PROCEEDINGS, P528, DOI 10.1109/DAC.1998.724528
- [9] FILKORN T, 1992, P 6 INT WORKSH HIGH, P344
- [10] Fin A, 2001, PROCEEDINGS OF THE NINTH INTERNATIONAL SYMPOSIUM ON HARDWARE/SOFTWARE CODESIGN, P17, DOI 10.1109/HSC.2001.924644