Characterization on ESD devices with test structures in silicon germanium RF BiCMOS process

被引：0
|
作者：
Ker, MD [1 ]
Wu, WL [1 ]
Chang, CY [1 ]
机构：
[1] Natl Chiao Tung Univ, Inst Elect, Nanoelect & Gigascale Syst Lab, Hsinchu 30039, Taiwan
来源：
ICMTS 2004: PROCEEDINGS OF THE 2004 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES | 2004年
关键词：
D O I：
10.1109/ICMTS.2004.1309292
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Different electrostatic discharge (ESD) devices in a 0.35-mum silicon germanium (SiGe) RF BiCMOS process are characterized in detail by transmission line pulse (TLP) generator and ESD simulator for on-chip ESD protection design. The test structures of diodes with different p-n junctions and the silicon-germanium heterojunction bipolar transistors (HBTs) with different layout parameters have been drawn for investigating their ESD robustness. The human-body-model (HBM) ESD robustness of SiGe HBTs with the optional low-voltage (LV), ligh-voltage (HV), and high-speed (HS) implantations has been measured and compared in the experimental test chips.
引用
收藏
页码：7 / 12
页数：6
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