Characterization on ESD devices with test structures in silicon germanium RF BiCMOS process

被引:0
|
作者
Ker, MD [1 ]
Wu, WL [1 ]
Chang, CY [1 ]
机构
[1] Natl Chiao Tung Univ, Inst Elect, Nanoelect & Gigascale Syst Lab, Hsinchu 30039, Taiwan
来源
ICMTS 2004: PROCEEDINGS OF THE 2004 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES | 2004年
关键词
D O I
10.1109/ICMTS.2004.1309292
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Different electrostatic discharge (ESD) devices in a 0.35-mum silicon germanium (SiGe) RF BiCMOS process are characterized in detail by transmission line pulse (TLP) generator and ESD simulator for on-chip ESD protection design. The test structures of diodes with different p-n junctions and the silicon-germanium heterojunction bipolar transistors (HBTs) with different layout parameters have been drawn for investigating their ESD robustness. The human-body-model (HBM) ESD robustness of SiGe HBTs with the optional low-voltage (LV), ligh-voltage (HV), and high-speed (HS) implantations has been measured and compared in the experimental test chips.
引用
收藏
页码:7 / 12
页数:6
相关论文
共 50 条
  • [21] Test Structure and Analysis for Accurate RF-Characterization of Tungsten Through Silicon Via (TSV) Grounding Devices
    Blaschke, Volker
    Jebory, Hadi
    2013 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS), 2013, : 33 - 36
  • [22] Test Structures for Characterization of Through Silicon Vias
    Stucchi, M.
    Perry, D.
    Katti, G.
    Dehaene, W.
    2010 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, 23RD IEEE ICMTS CONFERENCE PROCEEDINGS, 2010, : 130 - 134
  • [23] CHARACTERIZATION OF HYDROGENATED SILICON THIN FILMS AND DIODE STRUCTURES WITH INTEGRATED SILICON AND GERMANIUM NANOPARTICLES
    Stuchlik, J.
    Fajgar, R.
    Remes, Z.
    Kupcik, J.
    Stuchlikova, H.
    9TH INTERNATIONAL CONFERENCE ON NANOMATERIALS - RESEARCH & APPLICATION (NANOCON 2017), 2018, : 123 - 127
  • [24] Test structures and DRIE topography for bulk silicon MEMS devices
    Ruan, Y
    Zhang, DC
    He, XF
    Wang, YY
    2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS, 2004, : 631 - 632
  • [25] The influence of heavily doped buried layer implants on electrostatic discharge (ESD), latchup, and a silicon germanium heterojunction bipolar transistor in a BiCMOS SiGE technology
    Voldman, S
    Lanzerotti, L
    Morris, W
    Rubin, L
    2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS, 2004, : 143 - 151
  • [26] Compact On-Wafer Test Structures for Device RF Characterization
    Esfeh, Babak Kazemi
    Ben Ali, Khaled
    Raskin, Jean-Pierre
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (08) : 3101 - 3107
  • [27] Test Structures for Characterization of Through-Silicon Vias
    Stucchi, Michele
    Perry, Daniel
    Katti, Guruprasad
    Dehaene, Wim
    Velenis, Dimitrios
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2012, 25 (03) : 355 - 364
  • [28] Process stress estimation for MEMS RF switches with capacitive test structures
    Ferrario, L
    Armaroli, C
    Margesin, B
    Zen, M
    Soncini, G
    ICMTS 2003: PROCEEDINGS OF THE 2003 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, 2003, : 40 - 44
  • [29] A 1.1 THz Gain-Bandwidth W-Band Amplifier in a 0.12 μm Silicon Germanium BiCMOS Process
    Kim, Joohwa
    Buckwalter, James F.
    IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2010, 20 (11) : 625 - 627
  • [30] Design of ESD Protection for Large Signal Swing RF Inputs Operating to 24GHz in 0.18um SiGe BiCMOS Process
    Parthasarathy, Srivatsan
    Carrillo-Ramirez, Rodrigo
    Salcedo, Javier
    Hajjar, J-J
    PROCEEDINGS OF THE 2015 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC 2015), 2015, : 413 - 416