Kiwi: Synthesis of FPGA Circuits from Parallel Programs

被引:46
作者
Greaves, David [1 ]
Singh, Satnam [2 ]
机构
[1] Univ Cambridge, Comp Lab, Cambridge CB3 0FD, England
[2] Microsoft Res Cambridge, Cambridge CB3 0FD, England
来源
PROCEEDINGS OF THE SIXTEENTH IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES | 2008年
关键词
D O I
10.1109/FCCM.2008.46
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Me describe the Kiwi parallel programming library, and its associated synthesis system which is used to transform C# parallel programs into circuits for realization on FPGAs. The Kiwi system is targeted at making reconfigurable computing technology accessible to software engineers that are willing to express their computations as parallel programs. Although there has been much work on compiling sequential C-like programs to hardware by automatically 'discovering' parallelism, we work by exploiting the parallel architecture communicated by the designer through the choice of parallel and concurrent programming language constructs. Specifically we describe a system that takes .NET assembly language with suitable custom attributes as input and produces Verilog output which is mapped to FPGAs. Re can then choose to apply, analysis and verification techniques to either the high-level representation in C# or other. NET languages or to the generated RTL netlists. A distinctive aspect of our approach is the exploitation of existing language constructs for concurrent programming and synchronization which contrasts with other schemes which introduce specialized concurrency control constructs to extend a sequential language.
引用
收藏
页码:3 / +
页数:2
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