A compact ultra low-power pulse delay and extension circuit for neuromorphic processors

Although silicon neurons communicate among each other using fast spikes, neuromorphic architectures often require long delays and pulse lengths to process temporal signals. In this paper we present a compact and power efficient pulse extension circuit that can convert short spike events into delayed pulses with configurable delay and pulse lengths that range from fractions of microseconds up to tens of milliseconds. The circuit proposed can be used to realize programmable axonal delays in neuromorphic architectures and to support the generation of synaptic dynamics with biologically plausible pulse lengths in mixed-signal analog/digital circuits. To validate the proposed scheme, we designed the pulse delay and extension circuit using a standard 0.18 mu m CMOS process and performed post-layout Monte Carlo simulations. We describe the circuit and demonstrate how it can be configured to obtain biological long configurable delays and extension periods. We assess its operation via circuit simulation results and present an analysis of the Monte Carlo simulations that shows how the proposed circuit is resistant to mismatch with a standard deviation in the produced delay and pulse periods of less than 2%.