Poly-Si Thin-Film Transistor Nonvolatile Memory Using Ge Nanocrystals as a Charge Trapping Layer Deposited by the Low-Pressure Chemical Vapor Deposition

被引：6

作者：

Kuo, Po-Yi ^{[1
]}

Chao, Tien-Sheng ^{[1
]}

Huang, Jyun-Siang ^{[1
]}

Lei, Tan-Fu ^{[2
,3
]}

机构：

[1] Natl Chiao Tung Univ, Dept Electrophys, Hsinchu 300, Taiwan

[2] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 30010, Taiwan

[3] Natl Chiao Tung Univ, Inst Elect, Hsinchu 30010, Taiwan

来源：

IEEE ELECTRON DEVICE LETTERS | 2009年 / 30卷 / 03期

关键词：

Charge retention; endurance; Ge nanocrystals (Ge-NCs); nonvolatile memory; polycrystalline silicon thin-film transistors (poly-Si TFTs); programming/erasing; FLASH MEMORY; FABRICATION;

D O I：

10.1109/LED.2008.2011145

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have successfully developed and fabricated a poly-Si thin-film transistor (poly-Si TFT) nonvolatile memory using Ge nanocrystals (Ge-NCs) as a charge trapping layer. Process compatibility and memory operation of the device were investigated. The Ge-NC trapping layer was directly deposited by low-pressure chemical vapor deposition at 370 degrees C. Results show that the new poly-Si TFT nonvolatile Ge-NC memory has good programming/erasing efficiency, long charge retention time, and good endurance characteristics. These results show that poly-Si TFT nonvolatile Ge-NC memory is the promising nonvolatile memory candidate for system-on-panel application in the future.

引用

页码：234 / 236

页数：3

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