A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET

被引:0
作者
Im, Jay [1 ]
Zheng, Kevin [1 ]
Chou, Adam [1 ]
Zhou, Lei [1 ]
Kim, Jae Wook [1 ]
Chen, Stanley [1 ]
Wang, Yipeng [2 ]
Hung, Hao-Wei [2 ]
Tan, KeeHian [2 ]
Lin, Winson [1 ]
Roldan, Arianne [1 ]
Carey, Declan [3 ]
Chlis, Ilias [3 ]
Casey, Ronan [3 ]
Bekele, Ade [1 ]
Cao, Ying [1 ]
Mahashin, David [1 ]
Ahn, Hong [1 ]
Zhang, Hongtao [1 ]
Frans, Yohan [1 ]
Chang, Ken [1 ]
机构
[1] Xilinx, San Jose, CA 95124 USA
[2] Xilinx, Singapore, Singapore
[3] Xilinx, Cork, Ireland
来源
2020 IEEE INTERNATIONAL SOLID- STATE CIRCUITS CONFERENCE (ISSCC) | 2020年
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暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:116 / +
页数:3
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