共 35 条
- [1] Drain Current Modeling of Tunnel FET using Simpson's Rule [J]. SILICON, 2022, 14 (11) : 5931 - 5939
- [2] Arun A. V., 2021, 2021 International Conference on Communication, Control and Information Sciences (ICCISc), DOI 10.1109/ICCISc52257.2021.9485005
- [3] 1T Capacitor-Less DRAM Cell Based on Asymmetric Tunnel FET Design [J]. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2015, 3 (03): : 223 - 228
- [5] Design and simulation of triple metal double-gate germanium on insulator vertical tunnel field effect transistor [J]. MICROELECTRONICS JOURNAL, 2021, 114
- [6] Device Simulation Software, 2016, ATLAS
- [8] Analysis of nanoscale digital circuits using novel drain-gate underlap DMG hetero-dielectric TFET [J]. MICROELECTRONICS JOURNAL, 2022, 119