Design and analysis of dopingless 1T DRAM using work function engineered tunnel field effect transistors

被引:7
作者
Arun, A. V. [1 ]
Sreelekshmi, P. S. [1 ]
Jacob, Jobymol [2 ]
机构
[1] APJ Abdul Kalam Technol Univ, Model Engn Coll Kochi, Thiruvananthapam 695016, Kerala, India
[2] APJ Abdul Kalam Technol Univ, Coll Engn Poonjar, Thiruvananthapuram, Kerala, India
来源
MICROELECTRONICS JOURNAL | 2022年 / 124卷
关键词
Dopingless DRAM; Tunnel field effect transistor; Band to band tunneling; Retention time; Sense margin; Workfunction engineering; GATE; RETENTION;
D O I
10.1016/j.mejo.2022.105433
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a dopingless DRAM based on work function engineered Tunnel field effect transistor is proposed. Gate metal workfunction engineering is done to enhance ON/OFF current ratio of drain current, thereby improving the sense margin and retention time. Drain electrode is made up of dual metal, so as to suppress ambipolar current. The analysis of dual material gate dual drain electrode DRAM (DMG DDE DRAM) and triple material gate dual drain electrode DRAM (TMG DDE DRAM) is done in terms of retention time and sense margin. The performance parameters with different device dimensions and bias conditions are analyzed. It is observed that the proposed DRAMs work well even when the dimensions are scaled down. In addition, the proposed DRAMs have comparable performance with the conventional DRAMs and provide better performance when compared with other dopingless DRAM. Retention times of 430 ms and 370 ms, sense margins of 130 nA and 101 nA are achieved with TMG DDE DRAM and DMG DDE DRAM respectively.
引用
收藏
页数:7
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