Characterization of spiral inductors with patterned floating structures

被引:37
作者
Chang, CA [1 ]
Tseng, SP
Chuang, JY
Jiang, SS
Yeh, JA
机构
[1] Natl Tsing Hua Univ, Inst Elect Engn, Hsinchu 300, Taiwan
[2] Natl Tsing Hua Univ, Inst Microelectromech Syst, Hsinchu 300, Taiwan
关键词
floating structures; inductor; metal pole; model; patterned trench isolation;
D O I
10.1109/TMTT.2004.827002
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The impact of two different types of floating patterns on spiral inductors was investigated. Both patterned trench isolation with a floating p/n junction and floating metal poles were implemented underneath reference spiral inductors. All three types of inductors have an identical spiral geometry. Combination of patterned trench isolation with a floating p/n junction increases maximum quality factor (Q(max)) by 17% compared to the reference inductors. The floating metal poles enable adjustment of the frequency at Q(max) (f(max)) without hampering the Q(max) ladder-type lump-element model was employed to analyze inductor performance after it was demonstrated to precisely capture behavior of all three inductors. Enhancement of the quality factor due to patterned trench isolation with a floating p/n junction was found to result from an increment of effective resistivity in substrates. Reduction of the frequency f(max) due to the floating metal poles was caused by increasing effective coupling capacitance between the spiral inductors and substrate.
引用
收藏
页码:1375 / 1381
页数:7
相关论文
共 23 条
[1]   RF CMOS on high-resistivity substrates for system-on-chip applications [J].
Benaissa, K ;
Yang, JY ;
Crenshaw, D ;
Williams, B ;
Sridhar, S ;
Ai, J ;
Boselli, G ;
Zhao, S ;
Tang, SP ;
Ashburn, S ;
Madhani, P ;
Blythe, T ;
Mahalingam, N ;
Shichijo, H .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (03) :567-576
[2]  
BURGHARTZ J, 1998, IEEE INT SOL STAT CI, P246
[3]   Spiral inductors and transmission lines in silicon technology using copper-damascene interconnects and low-loss substrates [J].
Burghartz, JN ;
Edelstein, DC ;
Jenkins, KA ;
Kwark, YH .
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 1997, 45 (10) :1961-1968
[4]   Progress in RF inductors on silicon - Understanding substrate losses [J].
Burghartz, JN .
INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, :523-526
[5]   LARGE SUSPENDED INDUCTORS ON SILICON AND THEIR USE IN A 2-MU-M CMOS RF AMPLIFIER [J].
CHANG, JYC ;
ABIDI, AA ;
GAITAN, M .
IEEE ELECTRON DEVICE LETTERS, 1993, 14 (05) :246-248
[6]   Characterization and Modeling of on-chip spiral inductors for Si RFICs [J].
Chao, CJ ;
Wong, SC ;
Kao, CH ;
Chen, MJ ;
Leu, LY ;
Chiu, KY .
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2002, 15 (01) :19-29
[7]   An ultra low-power rf bipolar technology on glass [J].
Dekker, R ;
Baltus, P ;
van Deurzen, M ;
vander Einden, W ;
Maas, H ;
Wagemans, A .
INTERNATIONAL ELECTRON DEVICES MEETING - 1997, TECHNICAL DIGEST, 1997, :921-923
[8]  
GRAY PR, 1995, PROCEEDINGS OF THE IEEE 1995 CUSTOM INTEGRATED CIRCUITS CONFERENCE, P83, DOI 10.1109/CICC.1995.518142
[9]   Suspended SOI structure for advanced O.1-μm CMOS RF devices [J].
Hisamoto, D ;
Tanaka, S ;
Tanimoto, T ;
Kimura, S .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (05) :1039-1046
[10]   Silicon-based high-Q inductors incorporating electroplated copper and low-K BCB dielectric [J].
Huo, X ;
Chen, KJ ;
Chan, PCH .
IEEE ELECTRON DEVICE LETTERS, 2002, 23 (09) :520-522