Automated logic SER analysis and on-line SER reduction

被引：1
作者：
Nieuwland, AK [1 ]
Gindner, P [1 ]
机构：
[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands
来源：
10TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS | 2004年
关键词：
D O I：
10.1109/OLT.2004.1319679
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper presents a method for automated analysis of a combinational circuit to find the most SEU sensitive path, and proposes a way to make this path more robust for SEU in a low cost way.
引用
收藏
页码：177 / 177
页数：1
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9TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, PROCEEDINGS, 2003, :111-115
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