Implementing a simple continuous speech recognition system on an FPGA

被引：20

作者：

Melnikoff, SJ ^{[1
]}

Quigley, SF ^{[1
]}

Russell, MJ ^{[1
]}

机构：

[1] Univ Birmingham, Dept Elect & Comp Engn, Birmingham B15 2TT, W Midlands, England

来源：

10TH ANNUAL IEEE SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES, PROCEEDINGS | 2002年

关键词：

D O I：

10.1109/FPGA.2002.1106682

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Speech recognition is a computationally demanding task, particularly the stage which uses Viterbi decoding for converting pre-processed speech data into words or sub-word units. We present an FPGA implementations of the decoder based on continuous hidden Markov models (HMMs) representing monophones, and demonstrate that it can process speech 75 times real time, using 45% of the slices of a Xilinx Virtex XCV1000.

引用

页码：275 / 276

页数：2