A novel MOSFET with vertical signal-transfer capability for 3D-structured CMOS image sensors

被引:8
作者
Goto, Masahide [1 ,2 ]
Hagiwara, Kei [1 ]
Iguchi, Yoshinori [1 ]
Ohtake, Hiroshi [1 ]
Saraya, Takuya [2 ]
Toshiyoshi, Hiroshi [2 ]
Hiramoto, Toshiro [2 ]
机构
[1] NHK Sci & Technol Res Labs, Setagaya Ku, Tokyo 1578510, Japan
[2] Univ Tokyo, Meguro Ku, Tokyo 1538505, Japan
基金
中国国家自然科学基金;
关键词
fully depleted silicon-on-insulator; three-dimensional integration; CMOS image sensor; More-than-Moore; MOSFET; SOI;
D O I
10.1002/tee.21974
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We have developed a novel MOSFET that can transfer signals vertically without through-silicon vias but by using a fully depleted silicon-on-insulator (FDSOI) structure with its source region connected to the back electrodes as well as the front ones. A prototype MOSFET fabricated using the backside anisotropic wet etching technique has confirmed that the electrical characteristics measured from the front and the back electrodes are identical. The subthreshold factor S of the prototype was found to be 64.5 mV/decade, suggesting a good switching performance. Since the double-sided MOSFET has vertical signal-transfer capability and excellent operating characteristics, it is expected to contribute to developing a More-than-Moore type device of three-dimensional integration such as pixel-parallel image sensors. (c) 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.
引用
收藏
页码:329 / 333
页数:5
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