A highly integrated joint servo system based on FPGA with Nios II processor

被引：2

作者：

Ni, F. L. ^{[1
]}

Jin, M. H. ^{[1
]}

Xie, Z. W. ^{[1
]}

Shi, Sh. C. ^{[1
]}

Liu, Y. Ch. ^{[1
]}

Liu, H. ^{[2
]}

Hirzinger, G. ^{[2
]}

机构：

[1] HIT, Robot Res Inst, Harbin 150001, Peoples R China

[2] German Aerosp Ctr, Inst Robot & Mechatron, Wessling 82230, Germany

来源：

IEEE ICMA 2006: PROCEEDING OF THE 2006 IEEE INTERNATIONAL CONFERENCE ON MECHATRONICS AND AUTOMATION, VOLS 1-3, PROCEEDINGS | 2006年

基金：

美国国家科学基金会;

关键词：

joint servo system; motion control; FPGA; NIOSII processor;

D O I：

10.1109/ICMA.2006.257757

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, FPGA (Field Programmable Gate Array) based joint servo system for the HIT/DLR arm has been investigated. A new fully digitized hardware design scheme of a joint servo controller has been presented, which is verified and implemented on one-chip FPGA with embedded NIOS II processor. This scheme not only realizes all sensor data acquisition, SPWM generation and motor vector control, but also realizes joint position, torque control and trajectory generation. Moreover, the realized controller IC also contains a high speed serial (25Mbps) communication interface based on LVDS (low voltage differential signal), which permits the on-fine configuration for all kinds of control parameters. Experimental results demonstrate the effectiveness of the compact joint servo controller for the HIT/DLR arm.

引用

页码：973 / +

页数：2

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