Analysis and Experimental Evaluation of Middle-Point Inductance's Effect on Switching Transients for Multiple-Chip Power Module Package

Middle-point inductance L-middle can he introduced in multiple-chip power module package designs. In this paper, the effect of middle-point inductance on switching transients is analyzed first using a frequency-domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying and L-middle extensive switching tests are conducted to evaluate the middle-point inductance's impact. Experiment result shows that the active MOSFET's turn-on loss decreases at higher values of L-middle while its turn-off loss increases. Detailed analysis of this loss variation is presented. In addition to the switching loss variation, it is also observed that different peak voltage stresses are imposed on the active switch and antiparallel diode during the switching transients. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of the lower MOSFET increases as L-middle goes up; however, the peak voltage of the antiparallel diode decreases significantly. The induced voltage spikes during upper MOSFET turn-on process is also evaluated, and an opposite trend is observed experimentally. Analysis of the voltage overshoot variation is discussed. Based on the experimental evaluation and analysis, a multiple-chip power module package design guideline is summarized considering the middle-point inductance's effect.