Metal-strip approach on junctionless TFET in the presence of positive charge

In this research, to achieve steep subthreshold slope, high I-on/I-off ratio and low ambipolarity in TFETs, we have proposed a device which consists of metal strips near drain-channel and source-channel interfaces. The proposed device is named as dual metal-strip charge plasma-based junction-less tunnel FET (DMS-CP-JL-TFET), which will improve the device performance in terms of DC and analog/RF figure of merits (FOMs). The introduction of a metal strip near the drain-channel interface which produces a wider energy gap reduces ambipolarity, while the metal strip near the source-channel interface delivers abruptness at the junction, leading to a better subthreshold slope and higher I-on/I-off ratio. Also, positive trap charge (PTC) is taken in the simulations, because the proposed devices have shown great improvement in the presence of PTC, which has also been discussed in this work. In supporting our work, we have added the optimization part for metal strips (M1 and M2) in terms of work functions, lengths to achieve better electrical characteristics.