Effects of etch-induced damage on the electrical characteristics of in-plane gated quantum wire transistors

In-plane gated (IPG) quantum wire transistors were fabricated using dry etching in a Cl-2/Ar plasma generated with an electron cyclotron resonance source. The electrical characteristics of the IPG transistors were correlated with the geometrical dimensions as well as the dry etching and passivation conditions. In-plane gates with the width of the channel (W-c) and the width of the gate isolation (W-g) ranging from 100 to 850 nm were studied. Good held-effect transistor characteristics with transconductances up to 371 mS/mm were obtained on these devices. At a gate-source voltage (V-GS) Of 2 V, the saturated drain-source current (I-DSAT) increased from 68 to 153 mu A as W-c increased from 440 to 800 nm. No current was measured on IPG transistors with W-c less than or equal to -130 nm. The quasi-one-dimensional channel can be completely pinched off with V-GS less than or equal to -1 V It was found that the gate leakage current decreased with a wider W-g and a deeper depth for the gate isolation. The leakage current at V-GS=2 V decreased significantly from 250 to <0.1 pA when the etch depth increased from 320 to 440 nm. The gate leakage current and I-DS were also found to increase with rf power used for etching due to additional defects generated at higher ion energy. These defects, however, can be passivated with low energy chlorine species, and reduction of the gate leakage current from 40 to 4.4 nA was observed after a 1 min Cl-2 plasma passivation. (C) 1996 American Vacuum Society.