An efficient FFT processor for ADSL applications

Asymmetric Digital Subscriber Line (ADSL) technology is a Discrete Multitone Modulation scheme that provides high data rate, broadband internet access over traditional phone lines. This technology utilizes the Fast Fourier Transform (FFT) to extract data contained in the discrete frequency bins. Using the traditional FFT implementation for a G.dmt application is prohibitive in terms of the total execution time. Increasing the system clock speed proves costly both in terms of silicon area and power consumption. This paper presents a novel FFT approach that greatly reduces the execution cycle time. The new FFT architecture, called the complex FFT processor, incorporates design techniques such as real folding and merged arithmetic to achieve up to a factor of 4 improvement in performance with a factor of about 1.5 increase in silicon area.