Design of fully-integrated 5GHz differentially-tuned CMOS LC VCO

被引:0
作者
Song, SI [1 ]
Shin, JK [1 ]
Han, S [1 ]
Ko, HS [1 ]
Kang, HY [1 ]
Yoo, TW [1 ]
Lee, MS [1 ]
机构
[1] Informat & Commun Univ, Sch Engn, Taejon 305732, South Korea
来源
6TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY, VOLS 1 AND 2, PROCEEDINGS: BROADBAND CONVERGENCE NETWORK INFRASTRUCTURE | 2004年
关键词
optical communication; optical receiver; voltage-controlled oscillators; clock and data recovery; CMOS integrated circuit design;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A fully integrated 5GHz differentially-tuned CMOS PMOS-NMOS cross-coupled LC voltage controlled oscillator (VCO) is presented. To increase the linearity of the VCO tuning characteristic, an LC tank structure which has the differentially tunable series varactor combination is used in this design. The VCO is designed in a 0.18 mum standard CMOS process with a 1.8V supply. It achieves a phase noise of -113.5dBc/Hz at 1MHz offset from a carrier frequency of 5GHz and has a tuning range of 1.45GHz (29%).
引用
收藏
页码:603 / 606
页数:4
相关论文
共 8 条
  • [1] FRAZIER H, 2001, J INFORMATION TECHNO, V3, P17
  • [2] Greshishchev Y. M., 1999, Proceedings of the 1999 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.99CH37024), P169, DOI 10.1109/BIPOL.1999.803552
  • [3] Design issues in CMOS differential LC oscillators
    Hajimiri, A
    Lee, TH
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) : 717 - 724
  • [4] Hajimiri A., 1998, IEEE J SOLID STATE C, V33
  • [5] LEE TH, 1998, DESIGN CMOS RAD FREQ
  • [6] Razavi B., 2017, DESIGN ANALOG CMOS I
  • [7] A 10-gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector
    Savoj, J
    Razavi, B
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (05) : 761 - 768
  • [8] WURZER M, P 1998 BIP BICMOS CI, P136