NA/sigma optimisation strategies for an advanced DUV stepper applied to 0.25 mu m and sub-0.25 mu m critical levels

被引：0
|
作者：
deBeeck, MO
Ronse, K
Ghandehari, K
Jaenen, P
Botermans, H
Finders, J
Lilygren, J
Baker, D
Vandenberghe, G
DeBisschop, P
Maenhoudt, M
VandenHove, L
机构：
来源：
OPTICAL MICROLITHOGRAPHY X | 1997年 / 3051卷
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, the results of an NA-sigma optimisation study are reported, carried out experimentally for an advanced ASML PAS5500/300 deep-UV stepper. The work has been primarily focused on a 0.25 and sub-0.25 mu m gate layer in a logic CMOS process. A positive and negative tone resist process have been compared in terms of CD control and line-end shortening. Dry etch effects and across-field behaviour has been taken into account. Furthermore the contact level of the 0.25 mu m process have been optimised. Effects of layer dependent NA-sigma settings on overlay have been studied.
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页码：320 / 332
页数：3
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