Silicon Interfacial Passivation Layer Chemistry for High-k/InP Interfaces

被引：12

作者：

Dong, Hong ^{[1
]}

Cabrera, Wilfredo ^{[1
]}

Qin, Xiaoye ^{[1
]}

Brennan, Barry ^{[1
]}

Zhernokletov, Dmitry ^{[2
]}

Hinkle, Christopher L. ^{[1
]}

Kim, Jiyoung ^{[1
]}

Chabal, Yves J. ^{[1
]}

Wallace, Robert M. ^{[1
,2
]}

机构：

[1] Univ Texas Dallas, Dept Mat Sci & Engn, Richardson, TX 75080 USA

[2] Univ Texas Dallas, Dept Phys, Richardson, TX 75080 USA

来源：

ACS APPLIED MATERIALS & INTERFACES | 2014年 / 6卷 / 10期

关键词：

silicon interfacial passivation layer; indium phosphide; high-k; diffusion; atomic layer deposition; CHEMICAL-VAPOR-DEPOSITION; AL2O3; THIN-FILMS; IN-SITU; THERMAL-STABILITY; INP(100) SURFACES; ENERGY; MECHANISMS; SILICATES; HAFNIUM; GROWTH;

D O I：

10.1021/am500752u

中图分类号：

TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

The interfacial chemistry of thin (1 nm) silicon (Si) interfacial passivation layers (IPLs) deposited on acid-etched and native oxide InP(100) samples prior to atomic layer deposition (ALD) is investigated. The phosphorus oxides are scavenged completely from the acid-etched samples but not completely from the native oxide samples. Aluminum silicate and hafnium silicate are possibly generated upon ALD and following annealing. The thermal stability of a high-k/Si/InP (acid-etched) stack are also studied by in situ annealing to 400 and 500 degrees C under ultrahigh vacuum, and the aluminum oxide/Si/InP stack is the most thermally stable. An indium out-diffusion to the sample surface is observed through the Si IPL and the high-k dielectric, which may form volatile species and evaporate from the sample surface.

引用

页码：7340 / 7345

页数：6

共 50 条

[21] Atomic layer deposition of high-k dielectrics on III-V semiconductor surfaces
Gougousi, Theodosia
PROGRESS IN CRYSTAL GROWTH AND CHARACTERIZATION OF MATERIALS, 2016, 62 (04) : 1 - 21
[22] PLD of high-k dielectric films on silicon
Ratzke, M
Kappa, M
Wolfframm, D
Kouteva-Arguirova, S
Reif, J
FIFTH INTERNATIONAL SYMPOSIUM ON LASER PRECISION MICROFABRICATION, 2004, 5662 : 406 - 411
[23] Atomic layer deposition of high-k dielectrics
Ye, Weibin
Huang, Guangzhou
Zhu, Jianming
Dai, Jinfu
VACUUM METALLURGY AND SURFACE ENGINEERING, PROCEEDINGS, 2007, : 291 - 298
[24] High-k Dielectric Passivation for GaN Diode with a Field Plate Termination
Yoshino, Michitaka
Horikiri, Fumimasa
Ohta, Hiroshi
Yamamoto, Yasuhiro
Mishima, Tomoyoshi
Nakamura, Tohru
ELECTRONICS, 2016, 5 (02)
[25] 2 MeV electron irradiation effects on bulk and interface of atomic layer deposited high-k gate dielectrics on silicon
Garcia, H.
Castan, H.
Duenas, S.
Bailon, L.
Campabadal, F.
Rafi, J. M.
Zabala, M.
Beldarrain, O.
Ohyama, H.
Takakura, K.
Tsunoda, I.
THIN SOLID FILMS, 2013, 534 : 482 - 487
[26] Atomic Layer Deposition of a High-k Dielectric on MoS2 Using Trimethylaluminum and Ozone
Cheng, Lanxia
Qin, Xiaoye
Lucero, Antonio T.
Azcatl, Angelica
Huang, Jie
Wallace, Robert M.
Cho, Kyeongjae
Kim, Jiyoung
ACS APPLIED MATERIALS & INTERFACES, 2014, 6 (15) : 11834 - 11838
[27] Atomic Layer Deposition of High-k Insulators on Epitaxial Graphene: A Review
Giannazzo, Filippo
Schiliro, Emanuela
Lo Nigro, Raffaella
Roccaforte, Fabrizio
Yakimova, Rositsa
APPLIED SCIENCES-BASEL, 2020, 10 (07):
[28] Interfaces of high-k dielectrics on GaAs: Their common features and the relationship with Fermi level pinning
Caymax, Matty
Brammertz, Guy
Delabie, Annelies
Sioncke, Sonja
Lin, Dennis
Scarrozza, Marco
Pourtois, Geoffrey
Wang, Wei-E
Meuris, Marc
Heyns, Marc
MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) : 1529 - 1535
[29] Selective Passivation of GeO2/Ge Interface Defects in Atomic Layer Deposited High-k MOS Structures
Zhang, Liangliang
Li, Huanglong
Guo, Yuzheng
Tang, Kechao
Woicik, Joseph
Robertson, John
McIntyre, Paul C.
ACS APPLIED MATERIALS & INTERFACES, 2015, 7 (37) : 20499 - 20506
[30] Atomic layer deposited high-k nanolaminate capacitors
Smith, S. W.
McAuliffe, K. G.
Conley, J. F., Jr.
SOLID-STATE ELECTRONICS, 2010, 54 (10) : 1076 - 1082

← 1 2 3 4 5 →