RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators

被引:84
作者
Jacobsen, Matthew [1 ]
Richmond, Dustin [1 ]
Hogains, Matthew [1 ]
Kastner, Ryan [1 ]
机构
[1] Univ Calif San Diego, La Jolla, CA 92093 USA
关键词
FPGA; Communication; Framework; Performance; communication; synchronization; integration; framework;
D O I
10.1145/2815631
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present RIFFA 2.1, a reusable integration framework for Field-Programmable Gate Array (FPGA) accelerators. RIFFA provides communication and synchronization for FPGA accelerated applications using simple interfaces for hardware and software. Our goal is to expand the use of FPGAs as an acceleration platform by releasing, as open source, a framework that easily integrates software running on commodity CPUs with FPGA cores. RIFFA uses PCI Express (PCIe) links to connect FPGAs to a CPU's system bus. RIFFA 2.1 supports FPGAs from Xilinx and Altera, Linux and Windows operating systems, and allows multiple FPGAs to connect to a single host PC system. It has software bindings for C/C++, Java, Python, and Matlab. Tests show that data transfers between hardware and software can reach 97% of the achievable PCIe link bandwidth.
引用
收藏
页数:23
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