Hysteresis-Free Nanosecond Pulsed Electrical Characterization of Top-Gated Graphene Transistors

We measure top-gated graphene field-effect transistors (GFETs) with nanosecond-range pulsed gate and drain voltages. Due to high-kappa dielectric or graphene imperfections, the drain current decreases by similar to 10% over timescales of similar to 10 mu s, consistent with charge trapping mechanisms. The pulsed operation leads to hysteresis-free I-V characteristics that are studied with pulses as short as 75 and 150 ns at the drain and gate, respectively. The pulsed operation enables reliable extraction of GFET intrinsic transconductance and mobility values independent of sweep direction, which are up to a factor of two higher than those obtained from simple dc characterization. We also observe drain-bias-induced charge trapping effects at lateral fields greater than 0.1 V/mu m. In addition, using modeling and capacitance-voltage measurements, we extract trap densities up to 10(12) cm(-2) in the top-gate dielectric (here Al2O3). This study illustrates important time- and field-dependent imperfections of top-gated GFETs with high-kappa dielectrics, which must be carefully considered for future developments of this technology.