New-superjunction LDMOST with N-buffer layer

被引:39
作者
Park, Il-Yong [1 ]
Salama, C. Andre T. [1 ]
机构
[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
CMOS compatible process; lateral; N-buffer layer; power MOSFET; shallow pillar height; substrate-assisted depletion effects; superjunction (SJ);
D O I
10.1109/TED.2006.877007
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A buffered superjunction LDMOST (SJ-LDMOST) structure, which reduces substrate-assisted depletion effects, is proposed and the experimental implementation in a CMOS technology are presented. The proposed structure uses an N-buffer layer between the pillars and the P-substrate to achieve charge compensation between the pillars, the N-buffer layer, and the P-substrate. The practical implementation involves the additional formation of the N-buffer and the pillars in a 0.8-mu m CMOS process. Both of the simulation and the experimental results confirm that the substrate effects are suppressed by the buffered structure.
引用
收藏
页码:1909 / 1913
页数:5
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