A new laterally conductive bridge random access memory by fully CMOS logic compatible process

被引：1

作者：

Hsieh, Min-Che ^{[1
]}

Chin, Yung-Wen ^{[1
]}

Lin, Yu-Cheng ^{[1
]}

Chih, Yu-Der ^{[2
]}

Tsai, Kan-Hsueh ^{[3
]}

Tsai, Ming-Jinn ^{[3
]}

King, Ya-Chin ^{[1
]}

Lin, Chrong Jung ^{[1
]}

机构：

[1] Natl Tsing Hua Univ, Inst Elect Engn, Microelect Lab, Hsinchu 300, Taiwan

[2] TSMC, Design Technol Div, Hsinchu 300, Taiwan

[3] Ind Technol Res Inst, Elect & Optoelect Res Lab, Hsinchu 31040, Taiwan

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2014年 / 53卷 / 04期

关键词：

D O I：

10.7567/JJAP.53.04ED10

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

This paper proposes a novel laterally conductive bridge random access memory (L-CBRAM) module using a fully CMOS logic compatible process. A contact buffer layer between the poly-Si and contact plug enables the lateral Ti-based atomic layer to provide on/off resistance ratio via bipolar operations. The proposed device reached more than 100 pulse cycles with an on/off ratio over 10 and very stable data retention under high temperature operations. These results make this Ti-based L-CBRAM cell a promising solution for advanced embedded multi-time programmable (MTP) memory applications. (C) 2014 The Japan Society of Applied Physics

引用

页数：5

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IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (11) :3283-3287

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