Integrated Simulation and Formal Verification of a Simple Autonomous Vehicle

被引:9
|
作者
Domenici, Andrea [1 ]
Fagiolini, Adriano [2 ]
Palmieri, Maurizio [1 ,3 ]
机构
[1] Univ Pisa, Dept Informat Engn, Pisa, Italy
[2] Univ Palermo, Dept Energy Informat Engn & Math Models DEIM, Palermo, Italy
[3] Univ Florence, DINFO, Florence, Italy
来源
SOFTWARE ENGINEERING AND FORMAL METHODS, SEFM 2017 | 2018年 / 10729卷
关键词
FPGAS; PVS;
D O I
10.1007/978-3-319-74781-1_21
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
This paper presents a proof-of-concept application of an approach to system development based on the integration of formal verification and co-simulation. A simple autonomous vehicle has the task of reaching an assigned straight path and then follow it, and it can be controlled by varying its turning speed. The correctness of the proposed control law has been formalized and verified by interactive theorem proving with the Prototype Verification System. Concurrently, the system has been co-simulated using the Prototype Verification System and the MathWorks Simulink tool: The vehicle kinematics have been simulated in Simulink, whereas the controller has been modeled in the logic language of the Prototype Verification System and simulated with the interpreter for the same language available in the theorem proving environment. With this approach, co-simulation and formal verification corroborate each other, thus strengthening developers' confidence in their analysis.
引用
收藏
页码:300 / 314
页数:15
相关论文
共 22 条
  • [1] Formal verification of a complex pipelined processor
    Hosabettu, R
    Gopalakrishnan, G
    Srivas, M
    FORMAL METHODS IN SYSTEM DESIGN, 2003, 23 (02) : 171 - 213
  • [2] A Formal Verification Framework for Runtime Assurance
    Slagel, J. Tanner
    White, Lauren M.
    Dutle, Aaron
    Munoz, Cesar A.
    Crespo, Nicolas
    NASA FORMAL METHODS, NFM 2024, 2024, 14627 : 322 - 328
  • [3] Formal Verification of a Complex Pipelined Processor
    Ravi Hosabettu
    Ganesh Gopalakrishnan
    Mandayam Srivas
    Formal Methods in System Design, 2003, 23 : 171 - 213
  • [4] Formal Verification of Semistructured Data Models in PVS
    Lee, Scott Uk-Jin
    Dobbie, Gillian
    Sun, Jing
    Groves, Lindsay
    JOURNAL OF UNIVERSAL COMPUTER SCIENCE, 2009, 15 (01) : 241 - 272
  • [5] Formal Verification of the VAMP Floating Point Unit
    Christian Jacobi
    Christoph Berg
    Formal Methods in System Design, 2005, 26 : 227 - 266
  • [6] Formal verification of the VAMP floating point unit
    Jacobi, C
    Berg, C
    FORMAL METHODS IN SYSTEM DESIGN, 2005, 26 (03) : 227 - 266
  • [7] Formal verification and empirical analysis of rollback relaxation
    Umamageswaran, K
    Subramani, K
    Wilsey, PA
    Alexander, P
    JOURNAL OF SYSTEMS ARCHITECTURE, 1998, 44 (6-7) : 473 - 495
  • [8] A Formal Verification Study on the Rotterdam Storm Surge Barrier
    Madlener, Ken
    Smetsers, Sjaak
    van Eekelen, Marko
    FORMAL METHODS AND SOFTWARE ENGINEERING, 2010, 6447 : 287 - 302
  • [9] Applying formal verification to the AAMP5 microprocessor: A case study in the industrial use of formal methods
    Srivas, MK
    Miller, SP
    FORMAL METHODS IN SYSTEM DESIGN, 1996, 8 (02) : 153 - 188
  • [10] FORMAL VERIFICATION FOR FAULT-TOLERANT ARCHITECTURES - PROLEGOMENA TO THE DESIGN OF PVS
    OWRE, S
    RUSHBY, J
    SHANKAR, N
    VONHENKE, F
    IEEE TRANSACTIONS ON SOFTWARE ENGINEERING, 1995, 21 (02) : 107 - 125