Understanding the Effects of Low-Temperature Passivation and Annealing on ZnO TFTs Test Structures

被引：0
作者：
Rodriguez-Davila, Rodolfo A. [1 ]
Bolshakov, Pavel [1 ]
Young, Chadwin D. [1 ]
Quevedo-Lopez, Manuel [1 ]
机构：
[1] Univ Texas Dallas, Dept Mat Sci & Engn, 800 West Campbell Rd, Richardson, TX 75083 USA
来源：
2019 IEEE 32ND INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS) | 2019年
基金：
美国国家科学基金会;
关键词：
ZnO; TFT; Al2O3; HfO2; passivation; annealing; DEPOSITED HFO2;
D O I：
10.1109/icmts.2019.8730965
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Back-gate ZnO TFTs with and without top-side passivation were fabricated and electrically characterized. Passivation layers consisting of HfO2, Al2O3, and Parylene were introduced to study their impact on the TFT performance. Annealing was done to improve the electrical characteristics of passivated devices by neutralizing the initial charge introduced as a result of the low-temperature passivation. Low temperature annealing combined with an Al2O3 passivation layer demonstrates an 1-V response comparable to ZnO TFTs without any passivation layer, indicating the viability of Al2O3 as a good candidate for passivating ZnO TFTs.
引用
收藏
页码：190 / 193
页数：4
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