A More Accurate and Robust Binary Ring-LWE Decryption Scheme and Its Hardware Implementation for IoT Devices

被引:10
作者
Xu, Dongdong [1 ]
Wang, Xiang [1 ]
Hao, Yuanchao [1 ]
Zhang, Zhun [1 ]
Hao, Qiang [1 ]
Zhou, Zhiyu [1 ]
机构
[1] Beihang Univ, Sch Elect & Informat Engn, Beijing 100191, Peoples R China
基金
中国国家自然科学基金;
关键词
Encryption; Hardware; Public key; Cryptography; Internet of Things; Gaussian distribution; Field programmable gate arrays; Decryption scheme; hardware architecture; hardware security; Internet-of-Things (IoT) security; lattice-based cryptography; ring-BinLWE; POLYNOMIAL MULTIPLICATION; DISCRETE LOGARITHMS; CRYPTOGRAPHY; ALGORITHMS; EFFICIENT; INTERNET;
D O I
10.1109/TVLSI.2022.3174205
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Learning with error (LWE) over the ring based on binary distribution (ring-BinLWE) has become a potential Internet-of-Things (IoT) confidentiality solution with its anti-quantum attack properties and uncomplicated calculations. Compared with ring-LWE based on discrete Gaussian distribution, the decryption scheme of ring-LWE based on binary distribution needs to be re-determined due to the asymmetry of the error distribution. The direct application of the ring-LWE decryption function based on discrete Gaussian distribution can cause serious misjudgment. In this article, we propose a more accurate and robust decryption scheme for ring-BinLWE based on 2's complement ring. Compared with the previous decryption function, the re-derived decryption function significantly improves the decoding rate by 50%. Furthermore, based on the proposed decryption function, high-performance, and lightweight hardware architectures for terminal devices in IoT are, respectively, proposed, which are scalable and can be easily adapted to ring-BinLWE hardware deployment with other parameter sets. When the parameter set is n = 256, q = 256, the high-performance implementation consumes 7.6k LUTs, 6.2k FFs, and 2.3k SLICEs on Spartan 6 field-programmable gate array (FPGA) platform. Compared with the previous implementation, our resource overhead increases by only 23% while the decryption accuracy is significantly improved by 50%. The lightweight implementation for parameter set n = 256, q = 256 consumes only 230 LUTs, 338 FFs, and 84 SLICEs on the Spartan 6 FPGA platform. Compared with the previous work, the area x time (AT) is reduced by 47.8%, which is more suitable for deployment on resource-constrained IoT nodes.
引用
收藏
页码:1007 / 1019
页数:13
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