Minimization of Bottleneck and Workstations for Assembly Line Balancing Problem in Power Transformer Manufacturing Using Heuristics

被引：0
|
作者：
Abu Bakar, Nurhanani [1 ]
Ramli, Mohammad Fadzli [1 ]
Zakaria, Mohd Zakimi [2 ]
Sin, Tan Chan [2 ]
Masran, Hafiz [1 ]
机构：
[1] Univ Malaysia Perlis, Inst Engn Math, Pauh Putra Main Campus, Arau 02600, Perlis, Malaysia
[2] Univ Malaysia Perlis, Sch Mfg Engn, Pauh Putra Main Campus, Arau 02600, Perlis, Malaysia
来源：
2018 IEEE 5TH INTERNATIONAL CONFERENCE ON SMART INSTRUMENTATION, MEASUREMENT AND APPLICATION (ICSIMA) | 2018年
关键词：
Assembly line balancing problem; heuristic method; multi-objective optimization; workstation; idle time; bottleneck; ALGORITHM; STRAIGHT;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This project deals with a case study of SALBP in power transformer manufacturing. Some workstations in assembly line experienced bottlenecks, while the others suffered with high idle time. Therefore, four heuristic methods are chosen in order to provide solutions for minimizing number of workstations and improve the bottlenecks simultaneously. In this study, LCR, RPW and LPT are successfully minimized number of workstation from 19 to 16 workstations. Consequently, these solutions affect the layout. On the contrary, SPT able to improve the bottleneck by reducing number of workstations from 19 to 17 without affect the line layout. Therefore, this has created an option for engineer to decide which decision should be implement to the assembly line due to enhance the line efficiency.
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页数：5
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