Status and Trends in Ge CMOS Technology

被引：17

作者：

Claeys, C. ^{[1
]}

Mitard, J. ^{[1
]}

Hellings, G. ^{[1
]}

Eneman, G. ^{[1
]}

De Jaeger, B. ^{[1
]}

Witters, L. ^{[1
]}

Loo, R. ^{[1
]}

Delabie, A. ^{[1
]}

Sioncke, S. ^{[1
]}

Caymax, M. ^{[1
]}

Simoen, E. ^{[1
]}

机构：

[1] IMEC, B-3001 Leuven, Belgium

来源：

2013 INTERNATIONAL CONFERENCE ON SEMICONDUCTOR TECHNOLOGY FOR ULTRA LARGE SCALE INTEGRATED CIRCUITS AND THIN FILM TRANSISTORS (ULSIC VS. TFT 4) | 2013年 / 54卷 / 01期

关键词：

ATOMIC LAYER DEPOSITION; GERMANIUM MOSFETS; GATE; PERFORMANCE; OPPORTUNITIES; CHALLENGES; PMOSFET; FILMS; FIELD;

D O I：

10.1149/05401.0025ecst

中图分类号：

O646 [电化学、电解、磁化学];

学科分类号：

081704 ;

摘要：

Since the last decade there has been renewed interest in Ge-based technologies for deep submicron CMOS technologies. Whereas good performance data has been reported for p-channel MOSFETs this was not the case for the n-channel counterpart. This manuscript first reviews some key technological aspects for Ge processing, before outlining the status and trends for p-and n-channel Ge MOSFETs in relation to the ITRS specifications. Special attention will be given to GeSn technologies.

引用

页码：25 / 37

页数：13

共 52 条

[41] Opportunities and challenges for Ge CMOS - Control of interfacing field on Ge is a key
Toriumi, Akira
Tabata, Toshiyuki
Lee, Choong Hyun
Nishimura, Tomonori
Kita, Koji
Nagashio, Kosuke
[J]. MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) : 1571 - 1576
[42] Undoped and in-situ B doped GeSn epitaxial growth on Ge by atmospheric pressure-chemical vapor deposition
Vincent, B.
Gencarelli, F.
Bender, H.
Merckling, C.
Douhard, B.
Petersen, D. H.
Hansen, O.
Henrichsen, H. H.
Meersschaut, J.
Vandervorst, W.
Heyns, M.
Loo, R.
Caymax, M.
[J]. APPLIED PHYSICS LETTERS, 2011, 99 (15)
[43] High quality Ge epitaxial layers in narrow channels on Si (001) substrates
Wang, G.
Rosseel, E.
Loo, R.
Favia, P.
Bender, H.
Caymax, M.
Heyns, M. M.
Vandervorst, W.
[J]. APPLIED PHYSICS LETTERS, 2010, 96 (11)
[44] Wang G., 2012, THESIS KU LEUVEN
[45] Ge/Si nanowire heterostructures as high-performance field-effect transistors
Xiang, Jie
Lu, Wei
Hu, Yongjie
Wu, Yue
Yan, Hao
Lieber, Charles M.
[J]. NATURE, 2006, 441 (7092) : 489 - 493
[46] Yamamoto T, 2007, INT EL DEVICES MEET, P1041
[47] Advanced strain engineering for state-of-the-art nanoscale CMOS technology
Yang Bin
Cai Ming
[J]. SCIENCE CHINA-INFORMATION SCIENCES, 2011, 54 (05) : 946 - 958
[48] Parallel core-shell metal-dielectric-semiconductor germanium nanowires for high-current surround-gate field-effect transistors
Zhang, Li
Tu, Ryan
Dai, Hongjie
[J]. NANO LETTERS, 2006, 6 (12) : 2785 - 2789
[49] Zhang Q., 2011, INT EL DEV M IEDM1 I, P728
[50] High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using HfO2/Al2O3/GeOx/Ge Gate Stacks Fabricated by Plasma Postoxidation
Zhang, Rui
Huang, Po-Chin
Lin, Ju-Chin
Taoka, Noriyuki
Takenaka, Mitsuru
Takagi, Shinichi
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (03) : 927 - 934

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