VLIW DSP for mobile applications

被引：21
|
作者：
Kumura, T [1 ]
Ikekawa, M [1 ]
Yoshida, M [1 ]
Kuroda, I [1 ]
机构：
[1] NEC Corp Ltd, Kawasaki, Kanagawa 213, Japan
来源：
IEEE SIGNAL PROCESSING MAGAZINE | 2002年 / 19卷 / 04期
关键词：
D O I：
10.1109/MSP.2002.1012346
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A general-purpose digital signal processor (DSP) core, the SPXK5 was developed. It was a four-way very long instruction word (VLIW) DSP core designed for multimedia applications on handheld terminals. The many low-power consumption features of the VLIW-based architectures made it possible for the SPXK5 to achieve both high performance and low-power consumption.
引用
收藏
页码：10 / 21
页数：12
相关论文
共 50 条
  • [21] Implementation of a wireless multimedia DSP chip for mobile applications
    Lee, J
    Sunwoo, MH
    JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2005, 40 (03): : 281 - 287
  • [22] A comparative study of the suitability of a custom computing machine and a VLIW DSP for use in 3G applications
    Neel, J
    Srikanteswara, S
    Reed, JH
    Athanas, PM
    2004 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS DESIGN AND IMPLEMENTATION, PROCEEDINGS, 2004, : 188 - 193
  • [23] Implementation of a Wireless Multimedia DSP Chip for Mobile Applications
    Jung L. Lee
    Myung H. Sunwoo
    Journal of VLSI signal processing systems for signal, image and video technology, 2005, 40 : 281 - 287
  • [24] Word-parallel CRC computation on VLIW DSP
    Hubaux, D
    Legat, JD
    ELECTRONICS LETTERS, 2002, 38 (02) : 64 - 65
  • [25] Compiler supports for VLIW DSP processors with SIMD intrinsics
    Kuan, Chi-Bang
    Lee, Jenq Kuen
    CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2012, 24 (05): : 517 - 532
  • [26] Advanced VLIW architectures unleash raw DSP horsepower
    Bindra, A
    ELECTRONIC DESIGN, 2000, 48 (10) : 73 - +
  • [27] An Efficient Parallel Instruction Execution Method for VLIW DSP
    Sun, Mengjun
    Shen, Zheng
    He, Hu
    2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 75 - +
  • [28] Compiler supports and optimizations for PAC VLIW DSP processors
    Lin, Yung-Chia
    Tang, Chung-Lin
    Wu, Chung-Ju
    Hung, Ming-Yu
    You, Yi-Ping
    Moo, Ya-Chiao
    Chen, Sheng-Yuan
    Lee, Jenq-Kuen
    LANGUAGES AND COMPILERS FOR PARALLEL COMPUTING, 2006, 4339 : 466 - +
  • [29] Accelerate Convolutional Neural Network with a customized VLIW DSP
    Guo, Peng
    Ma, Hong
    Guo, Ruoshan
    Liu, Zhuang
    Li, Pin
    Wang, Donglin
    PROCEEDINGS OF 2018 IEEE 9TH INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING AND SERVICE SCIENCE (ICSESS), 2018, : 723 - 726
  • [30] An Efficient and Extendable Modeling Approach for VLIW DSP Processors
    Sedaghati-Mokhtari, Naser
    Nazm-Bojnordi, Mahdi
    Hormati, Abbas
    Fakhraie, Sied Mehdi
    ADVANCES IN COMPUTER SCIENCE AND ENGINEERING, 2008, 6 : 267 - 274
12345