Design of a Direct Digital Synthesizer with an on-chip D/A-converter

被引：0

作者：

Vankka, J

Waltari, M

Kosunen, M

Halonen, K

机构：

来源：

ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE | 1997年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

A 140 MHz Direct Digital Synthesizer (DDS) with an on-chip D/A-converter is designed and processed in 0.8 mu m, BiCMOS. The on-chip D/A-converter avoids delays and line loading caused by interchip connections. The frequency resolution of the DDS is 0.0326 Hz with a corresponding frequency switching speed of 150 ns. The digital parts of the chip are implemented with CMOS design in order to reduce power consumption. The D/A-converter is designed with BiCMOS technology to achieve 10 bit accuracy at a clock rate of 140 MHz. The chip has a complexity of 19,100 transistors with a die area of 12.2 mm(2). The simulated power dissipation is 0.58 W at 140 MHz.

引用

页码：21 / 24

页数：4

共 50 条

[31] Superconducting direct digital synthesizer
Spooner, A
Lao, BN
Rowe, D
Harper, C
Schwarzbek, S
Durand, DJ
Eaton, L
Smith, AD
IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY, 1997, 7 (02) : 2270 - 2273
[32] A pipelined 12-bit analog-to-digital converter with continuous on-chip digital correction
Ekekwe, Ndubuisi
Ekenedu, Chinyeaka
2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4, 2007, : 669 - +
[33] On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs
Miyake, Yousuke
Kajihara, Seiji
Chen, Poki
2019 IEEE INTERNATIONAL TEST CONFERENCE IN ASIA (ITC-ASIA 2019), 2019, : 157 - 162
[34] Noise Voltage Analysis of Spiral Inductor for On-Chip Buck Converter Design
Ashenafi, Emeshaw
Chowdhury, Masud H.
2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2017, : 2126 - 2129
[35] On-chip Jitter Measurement Using Vernier Ring Time-to-digital Converter
Yu, Jianjun
Dai, Fa Foster
2010 19TH IEEE ASIAN TEST SYMPOSIUM (ATS 2010), 2010, : 167 - 170
[36] A GSM/EDGE/WCDMA modulator with on-chip D/A converter for base stations
Vankka, J
Ketola, J
Sommarek, J
Väänänen, O
Kosunen, M
Halonen, KAI
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2002, 49 (10): : 645 - 655
[37] A multicarrier QAM-modulator for WCDMA basestation with on-chip D/A converter
Kosunen, M
Vankka, J
Waltari, M
Halonen, K
PROCEEDINGS OF THE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2001, : 301 - 304
[38] The Design of Direct Digital Synthesizer Based On Cordic Algorithm and FPGA Implementation
Zhang, Xian
Zhao, Xinghua
Zhou, Binquan
PROCEEDINGS OF THE 2016 INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING, INFORMATION SCIENCE & APPLICATION TECHNOLOGY (ICCIA 2016), 2016, 56 : 122 - 126
[39] A virtual orthogonal output direct digital frequency synthesizer design and implementation
Wu, Chang
Lan, Zhong-Wen
Jia, Ke-lin
Bi, Chuang
ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 344 - 347
[40] Design of a direct digital frequency synthesizer based on least square approximation
National 'ASIC System' Engineering and Technology Research Centre, Southeast University, Nanjing 210096, China
Guti Dianzixue Yanjiu Yu Jinzhan, 2006, 4 (522-526):

← 1 2 3 4 5 →