Study of an SOISRAM sensitivity to SEU by 3-D device simulation

被引：8
作者：
Castellani-Coulié, K
Sagnes, B
Saigné, F
Palau, JM
Calvet, MC
Dodd, PE
Sexton, EW
机构：
[1] Univ Aix Marseille, F-13384 Marseille 13, France
[2] EADSST, F-78133 Les Mureaux, France
[3] Sandia Natl Labs, Albuquerque, NM 87185 USA
[4] Univ Montpellier 2, Ctr Elect & Microoptoelect Montpellier, Equipe Elect & Rayonnements, F-34095 Montpellier, France
来源：
IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2004年 / 51卷 / 05期
关键词：
sensitive regions; silicon on insulator (SOI); single event upset (SEU); static random-access memory (SRAM);
D O I：
10.1109/TNS.2004.835076
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Silicon on insulator static random-access memory cell sensitivity to single event upset is studied. Currents and sensitive regions are then considered. Because of the buried oxide, the main part of these results appears to be different to that for bulk technologies.
引用
收藏
页码：2799 / 2804
页数：6
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