Drain current model for nanoscale double-gate MOSFETs

被引:11
作者
Hariharan, Venkatnarayan [1 ]
Thakker, Rajesh [1 ]
Singh, Karmvir [1 ]
Sachid, Angada B. [1 ]
Patil, M. B. [1 ]
Vasi, Juzer [1 ]
Rao, V. Ramgopal [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Ctr Nanoelect, Bombay, Maharashtra, India
关键词
Body doping; Current; DGFET; DIBL; Mobility; Modeling; MOSFET; Short-channel; Sub-threshold slope; Velocity saturation; THRESHOLD VOLTAGE MODEL; SOI; SI;
D O I
10.1016/j.sse.2009.05.008
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A closed form inversion charge-based drain current model for a short channel symmetrically driven, lightly doped symmetric double-gate MOSFET (SDGFET) is presented. The model has physical origins, but has some fitting parameters included in order to yield a better match with TCAD device simulations. Velocity saturation and channel length modulation effects are self-consistently included in the model. The incorporation of DIBL effects in the model is based on a solution of the two-dimensional Laplace equation that had been reported earlier and that is believed to be especially suited when the physical gate-oxide thickness is not negligible compared to the silicon body thickness. Addition of support for body doping and low-field mobility degradation is also presented. A very good match is shown in I-d-V-g, I-d-V-d and g(DS)-V-d curves and a reasonable match is shown in g(m)-V-g curves, when compared with 2D device simulations. The match in various characteristics is shown for devices as short as 20 nm. (C) 2009 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1001 / 1008
页数:8
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