BiCMOS circuits for low voltage analog applications

被引:0
作者
Maschmann, M
Hosticka, BJ
Schardein, W
Kleine, U
机构
[1] FACHHSCH DORTMUND,D-44137 DORTMUND,GERMANY
[2] OTTO VON GUERICKE UNIV,D-39016 MAGDEBURG,GERMANY
来源
ELECTRICAL ENGINEERING | 1996年 / 79卷 / 05期
关键词
D O I
10.1007/BF01235876
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
''High driving capability'' and ''high speed'' are often used keywords in BiCMOS literature. This is valid for purely digital ICs and for circuits which contain analog BiCMOS parts. Two circuit examples presented in this article shall illuminate the abilities of BiCMOS analog circuits which are powered with low voltage supplies. The first example is a 2V audio amplifier and driver circuit capable of driving a 200 Omega load. The second example is a class-D power stage for hearing aid applications.
引用
收藏
页码:353 / 356
页数:4
相关论文
共 50 条
[41]   Worst case analysis of low-voltage analog MOS integrated circuits [J].
To, HY ;
Michael, C ;
Ismail, M .
38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, :278-281
[42]   Performance measurements of low-voltage CMOS/SOI analog fundamental circuits [J].
Terada, Jun ;
Matsuya, Yasuyuki ;
Douseki, Takakuni ;
Yamada, Junzo .
NTT R and D, 2001, 50 (11) :874-879
[43]   Techniques for the Design of Low Voltage Power Efficient Analog and Mixed Signal Circuits [J].
Ramirez-Angulo, J. ;
Carvajal, Ramon G. ;
Lopez-Martin, Antonio .
22ND INTERNATIONAL CONFERENCE ON VLSI DESIGN HELD JOINTLY WITH 8TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS, 2009, :26-+
[44]   Performance optimization of BiCMOS circuits under reduced supply voltage [J].
Yamauchi, T ;
Okajima, Y ;
Kurosaki, K .
ELECTRICAL ENGINEERING IN JAPAN, 1997, 121 (04) :56-64
[45]   LOW-VOLTAGE LOW-POWER ANALOG INTEGRATED-CIRCUITS - GUEST EDITORIAL [J].
SERDIJN, WA ;
VANDERWOERD, AC ;
KUENEN, JC .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 1995, 8 (01) :5-6
[46]   Analog and RF SOI Circuits for Low Power and Harsh Environment Applications [J].
Demeus, Laurent ;
Dessard, Vincent ;
Delatte, Pierre ;
Picun, Gonzalo .
2007 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS, 2007, :8-12
[47]   Performance optimization of BiCMOS circuits under reduced supply voltage [J].
Yamauchi, Tsunenori ;
Okajima, Yoshinori ;
Kurosaki, Kazuhide .
Electrical Engineering in Japan (English translation of Denki Gakkai Ronbunshi), 1997, 121 (04) :56-64
[48]   DESIGN PRINCIPLES FOR LOW-VOLTAGE LOW-POWER ANALOG INTEGRATED-CIRCUITS [J].
SERDIJN, WA ;
VANDERWOERD, AC ;
VANROERMUND, AHM ;
DAVIDSE, J .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 1995, 8 (01) :115-120
[49]   Low-voltage and low-noise CMOS analog circuits using scaled devices [J].
Iwata, Atsushi ;
Yoshida, Takeshi ;
Sasaki, Mamoru .
IEICE TRANSACTIONS ON ELECTRONICS, 2007, E90C (06) :1149-1155
[50]   Low-voltage electronics for the stimulation of biological neural networks using fully complementary BiCMOS circuits [J].
Kim, CH ;
Wise, KD .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (10) :1483-1490